
LT3754
BLOCK DIAGRAM
13
SHDN /UVLO
+
12
V IN
11
INTV CC
7V(REGULATED)
UVLO( + ) = 3.8V, UVLO( ? ) = 3.4V
600k
1.476V
–
– +
V C
– +
SLOPE
OSC
R
S
Q
EN
GATE
SYNC
RT
10
15
25
SENSE
V OUT
27
31
REF
1.485V
PWM
V REF
+
–
INTV CC_UV
V IN_UV
SHDN_UV
4.2V( + )
3.7V( ? )
1.485V
EN
+
–
EN
6V
LED
LOGIC
52mV
PEAK
CURRENT
SOFT
START
100mV
OVER
CURRENT
HICCUP__MODE
LEDx
1-8, 17-24
FAULT
EN
9
16
14
+
–
29
CTRL
1V
+
+
LED CURRENT
CONTROL
CHANNEL X
1.1V
LED AMP
SS
OVERVOLTAGE
AMP
PWM
56R
– +
R
V PTAT
30
T SET
32
I SET
33
EXPOSED PAD (GND)
26
V C
28
OVP SET
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Figure 1. LT3754 Block Diagram
OPERATION
The operation of the LT3754 is best understood by referring
to the typical application circuit on the front page and the
Block Diagram in Figure 1. The LT3754 drives 16 strings
of LEDs by using a constant switching frequency, current
mode boost controller to generate a single output voltage
V OUT for the top (anode) of all LED strings. LED string
current is generated and controlled by connection of the
bottom LED in each string (cathode) to a current source
contained in each corresponding LED pin. Each LED pin
contains an accurate current sink to ground, programmable
between 10mA to 50mA using a single resistor at the I SET
pin. LED channels can be paralleled to achieve higher LED
currents. For applications requiring less than 16 strings
of LEDs, channels can be paralleled or disabled (connect
LED pin to V OUT before start-up). For optimum efficiency,
V OUT regulates to the lowest possible voltage allowable to
maintain regulated current in each LED string. Any OPEN
LED fault is indicated by the FAULT pin driven low without
effecting the operation of the connected LED strings.
The Block Diagram in Figure 1 illustrates the key functions
of the LT3754. It can be seen that two external supplies,
V REF and INTV CC , are generated by the LT3754. The V REF
pin provides a precision 1.485V output for use with external
resistors to program the CTRL, OVP SET and T SET input
pins. The INTV CC pin provides a regulated 7V output to
supply the gate driver for the boost controller GATE pin.
An accurate 1.476V threshold on the SHDN /UVLO pin
combined with a SHDN /UVLO pin current hysteresis allows
a programmable resistor divider from V IN to SHDN /UVLO
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